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HD6432351 데이터시트(PDF) 349 Page - Renesas Technology Corp |
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HD6432351 데이터시트(HTML) 349 Page - Renesas Technology Corp |
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349 / 1025 page ![]() Section 8 Data Transfer Controller (DTC) Rev. 3.00 Sep 15, 2006 page 315 of 988 REJ09B0330-0300 Read Write Read Write Address φ DTC activation request DTC request Data transfer Data transfer Transfer information write Transfer information write Transfer information read Transfer information read Vector read Figure 8.12 DTC Operation Timing (Example of Chain Transfer) 8.3.10 Number of DTC Execution States Table 8.8 lists execution statuses for a single DTC data transfer, and table 8.9 shows the number of states required for each execution status. Table 8.8 DTC Execution Statuses Mode Vector Read I Register Information Read/Write J Data Read K Data Write L Internal Operations M Normal 1 6 1 1 3 Repeat 1 6 1 1 3 Block transfer 1 6 N N 3 Note: N: Block size (initial setting of CRAH and CRAL) |
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