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HD6432351 데이터시트(PDF) 1018 Page - Renesas Technology Corp |
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HD6432351 데이터시트(HTML) 1018 Page - Renesas Technology Corp |
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1018 / 1025 page ![]() Appendix E Pin States at Power-On Rev. 3.00 Sep 15, 2006 page 984 of 988 REJ09B0330-0300 E.2 When Pins Settle from the High-Impedance State at Power-On When the STBY pin level changes from low to high after powering on, the chip goes to the power- on reset state after a high level is detected at the STBY pin. While the chip detects a low level at the STBY pin, it is in the hardware standby mode. During this interval, the pins are in the high- impedance state. After detecting a high level at the STBY pin, the chip starts oscillation. VCC STBY NMI RES φ Power-on reset tOSC1 NMI = High RES = Low T1 Confirm t1min and tNMIS. Hardware standby mode Figure E.2 When Pins Settle from the High-Impedance State at Power-On |
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