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HD64F2149YV 데이터시트(PDF) 451 Page - Renesas Technology Corp

부품명 HD64F2149YV
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV 데이터시트(HTML) 451 Page - Renesas Technology Corp

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Section 14 Watchdog Timer (WDT)
Rev. 3.00 Jan 18, 2006 page 423 of 1044
REJ09B0280-0300
14.5.2
Changing Value of CKS2 to CKS0
If bits CKS2 to CKS0 in TCSR are written to while the WDT is operating, errors could occur in
the incrementation. Software must stop the watchdog timer (by clearing the TME bit to 0) before
changing the value of bits CKS2 to CKS0.
14.5.3
Switching between Watchdog Timer Mode and Interval Timer Mode
If the mode is switched from watchdog timer to interval timer, or vice versa, while the WDT is
operating, errors could occur in the incrementation. Software must stop the watchdog timer (by
clearing the TME bit to 0) before switching the mode.
14.5.4
System Reset by
RESO
RESO
RESO
RESO Signal
If the
RESO output signal is input to the chip’s RES pin, the chip will not be initialized correctly.
Ensure that the
RESO signal is not logically input to the chip’s RES pin. When resetting the entire
system with the
RESO signal, use a circuit such as that shown in figure 14.8.
Reset input
Reset signal to entire system
Chip
RES
RESO
Figure 14.8 Sample Circuit for System Reset by
RESO
RESO
RESO
RESO Signal



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