HD64F2149YV datasheet(454/1075 Pages) RENESAS

454 / 1075 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Jan 18, 2006 page 426 of 1044

REJ09B0280-0300

Synchronous mode

 Serial data communication is synchronized with a clock

Serial data communication can be carried out with other chips that have a synchronous

communication function

 One serial data transfer format

Data length:

8 bits

 Receive error detection: Overrun errors detected

• Full-duplex communication capability

 The transmitter and receiver are mutually independent, enabling transmission and reception

to be executed simultaneously

 Double-buffering is used in both the transmitter and the receiver, enabling continuous

transmission and continuous reception of serial data

• LSB-first or MSB-first transfer can be selected

 This selection can be made regardless of the communication mode (with the exception of

7-bit data transfer in asynchronous mode)*

Note: *

LSB-first transfer is used in the examples in this section.

• Built-in baud rate generator allows any bit rate to be selected

• Choice of serial clock source: internal clock from baud rate generator or external clock from

SCK pin

• Capability of transmit and receive clock output

 The P86/SCK and P42/SCK2 pins are CMOS type outputs

 The P52/SCK0 pin is an NMOS push-pull type output (When using the P52/SCK pin as an

output, an external pull-up resistor must be connected in order to output high level)

• Four interrupt sources

 Four interrupt sources (transmit-data-empty, transmit-end, receive-data-full, and receive

error) that can issue requests independently

 The transmit-data-empty interrupt and receive-data-full interrupt can activate the data

transfer controller (DTC) to execute data transfer

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