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HD64F2149YV 데이터시트(PDF) 668 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 668 Page - Renesas Technology Corp |
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668 / 1075 page ![]() Section 18B Host Interface LPC Interface (LPC) Rev. 3.00 Jan 18, 2006 page 640 of 1044 REJ09B0280-0300 Table 18B.4 Fast A20 Gate Output Signals HA0 Data/Command Internal CPU Interrupt Flag (IBF) GA20 (P81) Remarks 1 H'D1 command 0 Q Turn-on sequence 0 1 data* 1 01 1 H'FF command 0 Q (1) 1 H'D1 command 0 Q Turn-off sequence 0 0 data* 2 00 1 H'FF command 0 Q (0) 1 H'D1 command 0 Q 0 1 data* 1 01 Turn-on sequence (abbreviated form) 1/0 Command other than H'FF and H'D1 1Q (1) 1 H'D1 command 0 Q 0 0 data* 2 00 Turn-off sequence (abbreviated form) 1/0 Command other than H'FF and H'D1 1Q (0) 1 1 H'D1 command Command other than H'D1 0 1 Q Q Cancelled sequence 1 H'D1 command 0 Q Retriggered sequence 1 H'D1 command 0 Q 1 H'D1 command 0 Q 0 Any data 0 1/0 Consecutively executed sequences 1 H'D1 command 0 Q (1/0) Notes: 1. Arbitrary data with bit 1 set to 1. 2. Arbitrary data with bit 1 cleard to 0. |
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