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HD64F2149YV 데이터시트(PDF) 792 Page - Renesas Technology Corp

부품명 HD64F2149YV
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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Section 24 Power-Down State
Rev. 3.00 Jan 18, 2006 page 764 of 1044
REJ09B0280-0300
24.7
Hardware Standby Mode
24.7.1
Hardware Standby Mode
When the
STBY pin is driven low, a transition is made to hardware standby mode from any mode.
In hardware standby mode, all functions enter the reset state and stop operation, resulting in a
significant reduction in power dissipation. As long as the prescribed voltage is supplied, on-chip
RAM data is retained. I/O ports are set to the high-impedance state.
In order to retain on-chip RAM data, the RAME bit in SYSCR should be cleared to 0 before
driving the
STBY pin low.
Do not change the state of the mode pins (MD1 and MD0) while the chip is in hardware standby
mode.
Hardware standby mode is cleared by means of the
STBY pin and the RES pin. When the STBY
pin is driven high while the
RES pin is low, the reset state is set and clock oscillation is started.
Ensure that the
RES pin is held low until the clock oscillation settles (at least 8 ms—the oscillation
settling time—when using a crystal oscillator). When the
RES pin is subsequently driven high, a
transition is made to the program execution state via the reset exception handling state.



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