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HD64F2149YV 데이터시트(PDF) 195 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 195 Page - Renesas Technology Corp |
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195 / 1075 page ![]() Section 7 Data Transfer Controller Rev. 3.00 Jan 18, 2006 page 167 of 1044 REJ09B0280-0300 Section 7 Data Transfer Controller 7.1 Overview The H8S/2169 or H8S/2149 includes a data transfer controller (DTC). The DTC can be activated by an interrupt or software, to transfer data. 7.1.1 Features • Transfer possible over any number of channels Transfer information is stored in memory One activation source can trigger a number of data transfers (chain transfer) • Wide range of transfer modes Normal, repeat, and block transfer modes available Incrementing, decrementing, and fixing of transfer source and destination addresses can be selected • Direct specification of 16-Mbyte address space possible 24-bit transfer source and destination addresses can be specified • Transfer can be set in byte or word units • A CPU interrupt can be requested for the interrupt that activated the DTC An interrupt request can be issued to the CPU after one data transfer ends An interrupt request can be issued to the CPU after all specified data transfers have ended • Activation by software is possible • Module stop mode can be set The initial setting enables DTC registers to be accessed. DTC operation is halted by setting module stop mode |
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