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H8SX/1663M 데이터시트(PDF) 557 Page - Renesas Technology Corp

부품명 H8SX/1663M
상세설명  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
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Section 11 EXDMA Controller (EXDMAC)
Rev. 2.00 Sep. 24, 2008 Page 525 of 1468
REJ09B0412-0200
(4)
External Request/Block Transfer Mode/Cycle Steal Mode
In block transfer mode, transfer of one block is performed continuously in the same way as in
burst mode. The timing of the start of the next block transfer is the same as in normal transfer
mode.
If a transfer request is generated for another channel, an EXDMA cycle for the other channel is
generated before the next block transfer.
The
EDREQ pin sensing timing is different for low level sensing and falling edge sensing. The
same applies to transfer request acceptance and transfer start timing.
Figures 11.48 to 11.52 show operation timing examples for various conditions.



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