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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SH7708 데이터시트(PDF) 43 Page - Renesas Technology Corp |
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SH7708 데이터시트(HTML) 43 Page - Renesas Technology Corp |
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43 / 633 page  25 Table 2.2 Addressing Modes and Effective Addresses (cont) Addressing Mode Instruction Format Effective Address Calculation Method Calculation Formula PC-relative Rn Effective address is sum of register PC and Rn contents. PC Rn + PC + Rn PC + Rn Immediate #imm:8 8-bit immediate data imm of TST, AND, OR, or XOR instruction is zero-extended. — #imm:8 8-bit immediate data imm of MOV, ADD, or CMP/EQ instruction is sign-extended. — #imm:8 8-bit immediate data imm of TRAPA instruction is zero-extended and multiplied by 4. — Note: For the addressing modes below that use a displacement (disp), the assembler descriptions in this manual show the value before scaling (x1, x2, or x4) is performed according to the operand size. This is done to clarify the operation of the IC. Refer to the relevant assembler notation rules for the actual assembler descriptions. @ (disp:4, Rn) ; Register indirect with displacement @ (disp:8, Rn) ; GBR indirect with displacement @ (disp:8, PC) ; PC-relative with displacement disp:8, disp:12; PC-relative |
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