SH7708 datasheet(220/633 Pages) RENESAS

220 / 633 page

202

Bits 6 and 5—Area 6 Burst Enable (A6BST1, A6BST0): These bits specify whether to use burst

ROM and PCMCIA burst mode in physical space area 6. When burst ROM and PCMCIA burst

mode are used, they set the number of burst transfers.

Bit 6: A6BST1

Bit 5: A6BST0

Description

Access area 6 as normal memory.

(Initial value)

Burst access of area 6 (4 consecutive accesses). Can

be used when bus width is 8, 16, or 32.

Burst access of area 6 (8 consecutive accesses). Can

be used only when bus width is 8 or 16.

Burst access of area 6 (16 consecutive accesses). Can

be used only when bus width is 8.

Bits 4 to 2—Area 2, Area 3 Memory Type (DRAMTP2, DRAMTP1, DRAMTP0): These bits

designate the types of memory connected to physical space areas 2 and 3. Normal memory, such

as ROM, SRAM, or flash RAM, can be directly connected. Pseudo-SRAM, DRAM, and

synchronous DRAM can also be directly connected.

Bit 4: DRAMTP2 Bit 3: DRAMTP1 Bit 2: DRAMTP0 Description

Areas 2 and 3 are normal memory

(Initial value)

Area 2: normal memory; area 3: PSRAM

Area 2: normal memory; area 3: SDRAM

Areas 2 and 3 are SDRAM

Area 2: normal memory; area 3: DRAM

Areas 2 and 3 are DRAM *

Reserved (cannot be set)

Note: * When selecting these bits, set the area 2 and 3 bus widths as word. The MD5 pin output is

the

RAS2 signal.

Bit 1—Area 5 Bus Type (A5PCM): Designates whether to access physical space area 5 as

PCMCIA space.

Bit 1: A5PCM

Description

Access physical space area 5 as normal memory.

(Initial value)

Access physical space area 5 as PCMCIA space.*

Note: * MD3 pin output is

CE2A.

SH7708 데이터시트(PDF) 220 Page - Renesas Technology Corp