MPC8610EC datasheet(47/96 Pages) FREESCALE

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Electrical Characteristics

MPC8610 Integrated Host Processor Hardware Specifications, Rev. 0

Freescale Semiconductor

Figure 19 provides the SSI transmitter timing with external clock.

Figure 19. SSI Transmitter with External Clock Timing Diagram

2.12.2.4

SSI Receiver Timing with External Clock

Table 38 provides the receiver timing parameters with external clock.

(Tx) CK high to STXD valid from high impedance

SS37

—

15.0

(Tx) CK high to STXD high/low

SS38

—

15.0

(Tx) CK high to STXD high impedance

SS39

—

15.0

Synchronous External Clock Operation

SRXD setup before (Tx) CK falling

SS44

10.0

—

SRXD hold after (Tx) CK falling

SS45

2.0

—

SRXD rise/fall time

SS46

—

6.0

Table 38. SSI Receiver with External Clock Timing Parameters

Parameter

Symbol

Min

Max

Unit

External Clock Operation

(Tx/Rx) CK clock period

SS22

81.4

—

(Tx/Rx) CK clock high period

SS23

36.0

—

(Tx/Rx) CK clock rise time

SS24

—

6.0

(Tx/Rx) CK clock low period

SS25

36.0

—

Table 37. SSI Transmitter with External Clock Timing Parameters (continued)

Parameter

Symbol

Min

Max

Unit

SS45

SS33

SS24

SS26

SS25

SS23

SSIn_TCK

SSIn_TFS

SSIn_TXD

SSIn_RXD

Note: SRXD input in synchronous mode only

SS31

SS22

SS44

SS39

SS38

SS37

SS46

(Input)

(Output)

(Input)

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