MPC8641DEC datasheet(89/140 Pages) FREESCALE

부품명	MPC8641DEC

상세설명	Integrated Host Processor Hardware Specifications

PDF	140 Pages

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제조업체	FREESCALE [Freescale Semiconductor, Inc]

홈페이지	http://www.freescale.com

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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

Serial RapidIO

Figure 56. Receiver Input Compliance Mask

Table 62. Receiver Input Compliance Mask Parameters Exclusive of Sinusoidal Jitter

15.9

Measurement and Test Requirements

Since the LP-Serial electrical specification are guided by the XAUI electrical interface specified in Clause

47 of IEEE 802.3ae-2002, the measurement and test requirements defined here are similarly guided by

Clause 47. In addition, the CJPAT test pattern defined in Annex 48A of IEEE802.3ae-2002 is specified as

the test pattern for use in eye pattern and jitter measurements. Annex 48B of IEEE802.3ae-2002 is

recommended as a reference for additional information on jitter test methods.

Receiver Type

VDIFFmin

(mV)

VDIFFmax

(mV)

A (UI)

B (UI)

1.25 GBaud

100

800

0.275

0.400

2.5 GBaud

100

800

0.275

0.400

3.125 GBaud

100

800

0.275

0.400

VDIFF max

-VDIFF max

VDIFF min

-VDIFF min

Time (UI)

1-B

1-A

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