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TMC2193KJC 데이터시트(PDF) 25 Page - Cadeka Microcircuits LLC. |
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TMC2193KJC 데이터시트(HTML) 25 Page - Cadeka Microcircuits LLC. |
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25 / 72 page ![]() PRODUCT SPECIFICATION TMC2193 REV. 1.0 3/26/03 25 Burst Envelope The TMC2193 includes the ability to adjust the burst ampli- tude and the shape of the burst. The Control Registers BRSTFULL, BRST1 and BRST2 hold the magnitude of the burst vector. BRSTFULL is the maximum amplitude of the burst vector. BRST1 and BRST2 determine the intermediate values of the burst vector for the burst envelope shaping. A 5 pixel burst envelope shaping occurs at the rising and falling edges of burst. At the rising edge of burst the next 5 pixels have the following weighting; BRSTFULL – BRST1, BRSTFULL – BRST2, BRSTFULL/2, BRST2, and BRST1. At the falling edge of burst the next 5 pixels have the follow- ing weighting; BRST1, BRST2, BRSTFULL/2, BRSTFULL – BRST2, and BRSTFULL – BRST1. With this flexibility the user determine the shape, amplitude and width of the burst signal. Figure 16. Burst Envelope Color-Difference Low-Pass Filters The chrominance portion of a composite video signal must be sufficiently bandlimited to avoid cross-color and cross- luminance distortion, and to preclude exceeding the allow- able bandwidth of a video channel. The color-difference low-pass filters on the TMC2193 establish chrominance bandwidths which meet the specifica- tions outlined in CCIR Report 624-3, Table II, Item 2.6, for system I over a range of pixel rates from 12.27 Mpps to 14.75 Mpps. Equal bandwidth is established for both color- difference channels. Figure 17. Gaussian Filter Response Sync and Pedestal Insertion Control Registers for this section Pedestal Enable The TMC2193 has the ability to independently select lines for pedestal insertion during the vertical blanking interval (VBI). For 525-line systems and using the NTSC line num- bering convention, in which the first vertical serration is on line 4 for field 1 and line 266 for field 2, the vertical interval lines map to the control registers VBIPEDxy as shown in Table 15. BRSTFULL BRST1 BRST2 BRSTFULL/2 BRSTFULL - BRST2 BRSTFULL - BRST1 BLANK BU 65-6294-18 Address Bit(s) Name 0x06 7-6 MODE 0x10 1-0 OUTMODE 0x11 5 COMP2DB 0x14 7-0 VBIPEDEM 0x15 7-0 VBIPEDEL 0x16 7-0 VBIPEDOM 0x17 7-0 VBIPENOL 0x1A 6-0 PEDHGT1 0x3F 3 C2DB_OFF 0x4B 7-0 NMBD 0x4B 7-4 PEDHGT2 -80 -70 -60 -50 -40 -30 -20 -10 0 0 0.1 0.2 0.3 0.4 0.5 Normalized Frequency (Pixel rate) Table 15. Line by Line Pedestal Enable Bit 76543210 VBIPEDEL 17 16 15 14 13 12 11 10 VBIPEDEM 25* 24 23 22 21 20 19 18 VBIPEDOL 279 278 277 276 275 274 273 VBIPEDOM 287* 286 285 284 283 282 281 280 |
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