STM32W108HB datasheet(73/179 Pages) STMICROELECTRONICS

73 / 179 page

STM32W108CB, STM32W108HB

Serial interfaces

Doc ID 16252 Rev 2

73/179

7.7.2

Serial DMA status register (SCx_DMASTAT)

Address offset: 0xC82C (SC1_DMASTAT) and 0xC02C (SC2_DMASTAT)

Reset value:

0x0000 0000

SC_TX

DMARS

SC_R

XDMA

RST

SC_TX

LODB

SC_TX

LODA

SC_RX

LODB

SC_RX

LODA

[5] SC_TXDMARST: Setting this bit resets the transmit DMA. The bit clears

automatically.

[4] SC_RXDMARST: Setting this bit resets the receive DMA. The bit clears

automatically.

[3] SC_TXLODB: Setting this bit loads DMA transmit buffer B addresses and allows the

DMA controller to start processing transmit buffer B. If both buffer A and B are

loaded simultaneously, buffer A will be used first. This bit is cleared when DMA

completes. Writing a zero to this bit has no effect.

Reading this bit returns DMA buffer status:

0: DMA processing is complete or idle.

1: DMA processing is active or pending.

[2] SC_TXLODA: Setting this bit loads DMA transmit buffer A addresses and allows the

DMA controller to start processing transmit buffer A. If both buffer A and B are

loaded simultaneously, buffer A will be used first. This bit is cleared when DMA

completes. Writing a zero to this bit has no effect.

Reading this bit returns DMA buffer status:

0: DMA processing is complete or idle.

1: DMA processing is active or pending.

[1] SC_RXLODB: Setting this bit loads DMA receive buffer B addresses and allows the

DMA controller to start processing receive buffer B. If both buffer A and B are loaded

simultaneously, buffer A will be used first. This bit is cleared when DMA completes.

Writing a zero to this bit has no effect.

Reading this bit returns DMA buffer status:

0: DMA processing is complete or idle.

1: DMA processing is active or pending.

[0] SC_RXLODA: Setting this bit loads DMA receive buffer A addresses and allows the

DMA controller to start processing receive buffer A. If both buffer A and B are

loaded simultaneously, buffer A will be used first. This bit is cleared when DMA

completes. Writing a zero to this bit has no effect.

Reading this bit returns DMA buffer status:

0: DMA processing is complete or idle.

1: DMA processing is active or pending.

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