AT45DB021D_09 datasheet(22/54 Pages) ATMEL

22 / 54 page

3638I–DFLASH–04/09

AT45DB021D

the data bytes in the buffer. During this time (tCOMP), the status register will indicate that the part

is busy. On completion of the compare operation, bit 6 of the status register is updated with the

result of the compare.

11.3 Auto Page Rewrite

This mode is only needed if multiple bytes within a page or multiple pages of data are modified in

a random fashion within a sector. This mode is a combination of two operations: Main Memory

Page to Buffer Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of

data is first transferred from the main memory to the buffer and then the same data (from the

buffer) is programmed back into its original page of main memory. To start the rewrite operation

for the DataFlash standard page size (264 bytes), a 1-byte opcode, 58H, must be clocked into

the device, followed by three address bytes comprised of 5 don’t care bits, 10 page address bits

(PA9-PA0) that specify the page in main memory to be rewritten and 9 don’t care bits. To initiate

an auto page rewrite for a binary page size (256 bytes), the opcode 58H must be clocked into

the device followed by three address bytes consisting of 6 don’t care bits, 10 page address bits

(A17 - A8) that specify the page in the main memory that is to be written and 8 don’t care bits.

When a low-to-high transition occurs on the CS pin, the part will first transfer data from the page

in main memory to a buffer and then program the data from the buffer back into same page of

main memory. The operation is internally self-timed and should take place in a maximum time of

tEP. During this time, the status register indicate that the part is busy.

If a sector is programmed or reprogrammed sequentially page by page, then the programming

algorithm shown in Figure 25-1 (page 46) is recommended. Otherwise, if multiple bytes in a

page or several pages are programmed randomly in a sector, then the programming algorithm

shown in Figure 25-2 (page 47) is recommended. Each page within a sector must be

updated/rewritten at least once within every 10,000 cumulative page erase/program operations

in that sector.

11.4 Status Register Read

The status register can be used to determine the device’s ready/busy status, page size, a Main

Memory Page to Buffer Compare operation result, the Sector Protection status or the device

density. The Status Register can be read at any time, including during an internally self-timed

program or erase operation. To read the status register, the CS pin must be asserted and the

opcode of D7H must be loaded into the device. After the opcode is clocked in, the 1-byte status

the status register, starting with the MSB (bit 7), will be clocked out on the SO pin during the next

eight clock cycles. After the one byte of the status register has been clocked out, the sequence

will repeat itself (as long as CS remains low and SCK is being toggled). The data in the status

Ready/busy status is indicated using bit 7 of the status register. If bit 7 is a 1, then the device is

not busy and is ready to accept the next command. If bit 7 is a 0, then the device is in a busy

state. Since the data in the status register is constantly updated, the user must toggle SCK pin to

check the ready/busy status. There are several operations that can cause the device to be in a

busy state: Main Memory Page to Buffer Transfer, Main Memory Page to Buffer Compare, Buf-

fer to Main Memory Page Program, Main Memory Page Program through Buffer, Page Erase,

Block Erase, Sector Erase, Chip Erase and Auto Page Rewrite.

The result of the most recent Main Memory Page to Buffer Compare operation is indicated using

bit 6 of the status register. If bit 6 is a 0, then the data in the main memory page matches the

AT45DB021D 데이터시트(PDF) 22 Page - ATMEL Corporation

AT45DB021D 데이터시트(HTML) 22 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

데이터시트 다운로드

링크 URL