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AT89LP6440 데이터시트(PDF) 78 Page - ATMEL Corporation

부품명 AT89LP6440
상세설명  8-bit Microcontroller with 64K Bytes In-System Programmable Flash
PDF  194 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT89LP6440 데이터시트(HTML) 78 Page - ATMEL Corporation

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78
3706A–MICRO–9/09
AT89LP6440 - Preliminary
center-aligned around the timer equal to TOP point. Symmetrical PWM may be used to generate
non-overlapping waveforms.
The TOP value in RCAP2L and RCAP2H is double buffered such that the output frequency is
only updated at the underflow. The channel data register (CCxL, CCxH) is also double-buffered
to prevent glitches. The output frequency and duty cycle for symmetrical PWM are given by the
following equations:
The extreme compare values represent special cases when generating a PWM waveform. If the
compare value is set equal to (or greater than) TOP, the output will remain high or low for non-
inverting and inverting modes, respectively. If the compare value is set to MIN (0000H), the out-
put will remain low or high for non-inverting and inverting modes, respectively.
Figure 13-9. Non-overlapping Waveforms Using Symmetrical PWM
13.4.2.1
Phase and Frequency Correct PWM
When T2CM
1-0 = 10B the Symmetrical PWM operates in phase and frequency correct mode. In
this mode the compare value double buffer is only updated when the timer equals MIN (under-
flow). This guarantees that the resulting waveform is always symmetrical around the TOP value
as shown in Figure 13-10 because the up and down count compare values are identical. The
TF2 interrupt flag is only set at underflow.
13.4.2.2
Phase Correct PWM
When T2CM
1-0 = 11B the Symmetrical PWM operates in phase correct mode. In this mode the
compare value double buffer is updated when the timer equals MIN (underflow) and TOP (over-
flow). The resulting waveform may not be completely symmetrical around the TOP value as
shown in Figure 13-11 because the up and down count compare values may not be identical.
However, this allows the pulses to be weighted toward one edge or another. The TF2 interrupt
flag is set at both underflow and overflow.
f
OUT
Oscillator Frequency
2
RCAP2H RCAP2L
{,
}
×
-----------------------------------------------------------------
1
TPS
1
+
---------------------
×
=
Non-Inverting:
Duty Cycle
100%
CCxH CCxL
{,
}
RCAP2H RCAP2L
{,
}
------------------------------------------------------
×
=
Inverting:
Duty Cycle
100%
RCAP2H RCAP2L
{,
}
CCxH CCxL
{,
}
–
RCAP2H RCAP2L
{,
}
---------------------------------------------------------------------------------------------------
×
=
{RCAP2H,RCA2L}
CP/RL2 = 0, T2CM1-0 = 10B, DCEN = 0
(Inverted) CCA
{CCAH,CCAL}
(Non-Inverted) CCB
{CCBH,CCBL}



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