AT89LP6440 datasheet(46/194 Pages) ATMEL

46 / 194 page

3706A–MICRO–9/09

AT89LP6440 - Preliminary

Figure 10-3. Input Circuit for P3.2, P3.3, P4.0, P4.1 and P4.2

10.1.3

Open-drain Output

The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor

of the port pin when the port latch contains a logic “0”. To be used as a logic output, a port con-

figured in this manner must have an external pull-up, typically a resistor tied to V

DD. The pull-

down for this mode is the same as for the quasi-bidirectional mode. The open-drain port configu-

ration is shown in Figure 10-4. The input circuitry of P3.2, P3.3, P4.0, P4.1 and P4.2 is not

disabled during Power-down (see Figure 10-3) and therefore these pins should not be left float-

ing during Power-down when configured in this mode.

Figure 10-4. Open-Drain Output

10.1.4

Push-pull Output

The push-pull output configuration has the same pull-down structure as both the open-drain and

the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port

latch contains a logic “1”. The push-pull mode may be used when more source current is needed

from a port output. The push-pull port configuration is shown in Figure 10-5.

Figure 10-5. Push-pull Output

Port

Input

Data

Port

From Port

Input

Data

PWD

Port

VCC

From Port

Input

Data

PWD

AT89LP6440 데이터시트(PDF) 46 Page - ATMEL Corporation