전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ATmega16U4 데이터시트(PDF) 20 Page - ATMEL Corporation

부품명 ATmega16U4
상세설명  8-bit Microcontroller with 16/32K Bytes of ISP Flash and USB Controller
PDF  408 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATmega16U4 데이터시트(HTML) 20 Page - ATMEL Corporation

Back Button ATmega16U4 Datasheet HTML 16Page - ATMEL Corporation ATmega16U4 Datasheet HTML 17Page - ATMEL Corporation ATmega16U4 Datasheet HTML 18Page - ATMEL Corporation ATmega16U4 Datasheet HTML 19Page - ATMEL Corporation ATmega16U4 Datasheet HTML 20Page - ATMEL Corporation ATmega16U4 Datasheet HTML 21Page - ATMEL Corporation ATmega16U4 Datasheet HTML 22Page - ATMEL Corporation ATmega16U4 Datasheet HTML 23Page - ATMEL Corporation ATmega16U4 Datasheet HTML 24Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 408 page
background image
20
7766D–AVR–01/09
ATmega16U4/ATmega32U4
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O registers, and the 1.25/2.5Kbytes of internal
data SRAM in the ATmega16U4/ATmega32U4 are all accessible through all these addressing
modes. The Register File is described in “General Purpose Register File” on page 12.
Figure 5-2.
Data Memory Map
5.2.1
Data Memory Access Times
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
CPU cycles as described in Figure 5-3.
Figure 5-3.
On-chip Data SRAM Access Cycles
32 R
egisters
64 I/O
R
egisters
I
nternal S RAM
$0000 - $001F
$0020 - $005F
$FFFF
$0060 - $00FF
D
ata Memory
160 E
xt I/O
R
eg.
ISRAM end : $05FF / $0AFF
ISRAM start : $0100
clk
WR
RD
Data
Data
Address
Address valid
T1
T2
T3
Compute Address
CPU
Memory Access Instruction
Next Instruction



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com