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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ATmega16U4 데이터시트(PDF) 26 Page - ATMEL Corporation |
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ATmega16U4 데이터시트(HTML) 26 Page - ATMEL Corporation |
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26 / 408 page  26 7766D–AVR–01/09 ATmega16U4/ATmega32U4 5.4 I/O Memory The I/O space definition of the ATmega16U4/ATmega32U4 is shown in “Register Summary” on page 388. All ATmega16U4/ATmega32U4 I/Os and peripherals are placed in the I/O space. All I/O loca- tions may be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32 general purpose working registers and the I/O space. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the instruction set section for more details. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATmega16U4/ATmega32U4 is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instruc- tions can be used. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with reg- isters 0x00 to 0x1F only. The I/O and peripherals control registers are explained in later sections. 5.4.1 General Purpose I/O Registers The ATmega16U4/ATmega32U4 contains three General Purpose I/O Registers. These registers can be used for storing any information, and they are particularly useful for storing global vari- ables and Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions. 5.4.2 General Purpose I/O Register 2 – GPIOR2 5.4.3 General Purpose I/O Register 1 – GPIOR1 5.4.4 General Purpose I/O Register 0 – GPIOR0 Bit 7654 32 1 0 MSB LSB GPIOR2 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0000 00 0 0 Bit 7654 32 1 0 MSB LSB GPIOR1 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0000 00 0 0 Bit 7654 32 1 0 MSB LSB GPIOR0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0000 00 0 0 |
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