ATmega16HVB datasheet(27/273 Pages) ATMEL

27 / 273 page

8042A–AVR–07/09

ATmega16HVB/32HVB

When this Oscillator is selected, start-up times are determined by the SUT Fuses as shown in

Table 9-2 on page 27.

Notes:

1. The device is shipped with this option selected.

2. The actual value of the added, selectable 4- 512 ms delay depends on the actual frequency of

the ”Ultra Low Power RC Oscillator” on page 27. See Table 9-3 on page 28 and ”Electrical

Characteristics” on page 228

9.2.2

Slow RC Oscillator

The Slow RC Oscillator provides a 131 kHz clock (typical value, refer to section ”Electrical Char-

acteristics” on page 228). This clock can be used as a timing reference for run-time calibration of

the Fast RC Oscillator and for accurately determining the actual ULP Oscillator frequency, refer

to ”OSI – Oscillator Sampling Interface” on page 29 for details.

To provide good accuracy when used as a timing reference, the Slow RC Oscillator has calibra-

tion bytes stored in the signature address space, refer to section ”Reading the Signature Row

from Software” on page 199 for details. The actual clock period of the Slow RC Oscillator in

μs

as a function of temperature is given by:

where T is the die temperature in Kelvin and T

HOT is the calibration temperature stored in the sig-

nature row. The die temperature can be found using the Voltage ADC, refer to section ”Voltage

ADC – 7-channel General Purpose 12-bit Sigma-Delta ADC” on page 117 for details.

9.2.3

Ultra Low Power RC Oscillator

The Ultra Low Power RC Oscillator (ULP Oscillator) provides a 128 kHz clock (typical value,

refer to section ”Electrical Characteristics” on page 228). This oscillator provides the clock for

the Watchdog Timer and Battery Protection modules. The actual ULP Oscillator frequency

depends on process variations and temperature, see ”Electrical Characteristics” on page 228.

The Oscillator is automatically enabled in all operational modes. It is also enabled during reset.

There are two alternative methods for determining the actual clock period of the ULP Oscillator:

Table 9-2.

Start-up times for the calibrated Fast RC Oscillator clock selection

SUT2:0

Start-up Time from

Power-save

Additional Delay from Reset, Typical Values(2)

000

6 CK

14 CK + 4 ms

001

6 CK

14 CK + 8 ms

010

6 CK

14 CK + 16 ms

011

6 CK

14 CK + 32 ms

100

6 CK

14 CK + 64 ms

101

6 CK

14 CK + 128 ms

110

6 CK

14 CK + 256 ms

111(1)

6 CK

14 CK + 512 ms

Slow RC period

Slow RC word - Slow RC temp prediction word

(TT

HOT)

–

---------------------------

⋅

1024

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