ATmega16HVB datasheet(37/273 Pages) ATMEL

37 / 273 page

8042A–AVR–07/09

ATmega16HVB/32HVB

Notes:

1. Runs only when OSI is enabled and RCOSC_SLOW is selected as source for OSI.

2. Address Match and Bus Connect/Disconnect Wake-up only

3. Discharge FET must be switched off for Charger Detect to be enabled.

4. VREGMON interrupt (Regulator Operation Condition Warning) not available.

10.2

Idle Mode

When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle

mode, stopping the CPU but allowing all peripheral functions to continue operating. This sleep

mode basically halts clk

CPU and clkFLASH, while allowing the other clocks to run. Idle mode

enables the MCU to wake up from external triggered interrupts as well as internal ones like the

Timer Overflow interrupt.

10.3

ADC Noise Reduction

When the SM2:0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC

Noise Reduction mode, stopping the CPU but allowing the Voltage ADC (V-ADC), Voltage Reg-

ulator Monitor (VREGMON), Watchdog Timer (WDT), Coulomb Counter (CC), Current Battery

Protection (CBP), and the Ultra Low Power RC Oscillator (RCOSC_ULP) to continue operating.

This sleep mode basically halts clk

I/O, clkCPU, and clkFLASH, while allowing the other clocks to run.

This improves the noise environment for the Voltage ADC, enabling higher accuracy on

measurements.

10.4

Power-save Mode

When the SM2..0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-

save mode. In this mode, the internal Fast RC Oscillator (RCOSC_FAST) is stopped, while

Watchdog Timer (WDT), Coulomb Counter (CC), Current Battery Protection (CBP) and the Ultra

Low Power RC Oscillator (RCOSC_ULP) continue operating.

This mode will be the default mode when application software does not require operation of

CPU, Flash or any of the peripheral units running at the Fast internal Oscillator (RCOSC_FAST).

If the current through the sense resistor is so small that the Coulomb Counter cannot measure it

accurately, Regular Current detection should be enabled to reduce power consumption. The

WDT keeps accurately track of the time so that battery self discharge can be calculated.

External Interrupts

Battery Protection

Watchdog Timer

Voltage Regulator

X(4)

Bandgap Reference

FET Driver

CHARGER_DETECT(3)

XXX

Table 10-2.

Active modules in different Sleep Modes (Continued)

Module

Mode

Active

Idle

ADC Noise

Reduction

Power-save

Power-off

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