ATmega1284P datasheet(4/380 Pages) ATMEL

4 / 380 page

8059D–AVR–11/09

ATmega1284P

pose I/O lines, 32 general purpose working registers, Real Time Counter (RTC), three flexible

Timer/Counters with compare modes and PWM, 2 USARTs, a byte oriented 2-wire Serial Inter-

face, a 8-channel, 10-bit ADC with optional differential input stage with programmable gain,

programmable Watchdog Timer with Internal Oscillator, an SPI serial port, IEEE std. 1149.1

compliant JTAG test interface, also used for accessing the On-chip Debug system and program-

ming and six software selectable power saving modes. The Idle mode stops the CPU while

allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The

Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip

functions until the next interrupt or Hardware Reset. In Power-save mode, the asynchronous

timer continues to run, allowing the user to maintain a timer base while the rest of the device is

sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchro-

nous Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode,

the Crystal/Resonator Oscillator is running while the rest of the device is sleeping. This allows

very fast start-up combined with low power consumption. In Extended Standby mode, both the

main Oscillator and the Asynchronous Timer continue to run.

The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On-

chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial

interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program

running on the AVR core. The boot program can use any interface to download the application

program in the application Flash memory. Software in the Boot Flash section will continue to run

while the Application Flash section is updated, providing true Read-While-Write operation. By

combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip,

the Atmel ATmega1284P is a powerful microcontroller that provides a highly flexible and cost

effective solution to many embedded control applications.

The ATmega1284P AVR is supported with a full suite of program and system development tools

including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators,

and evaluation kits.

2.2

Pin Descriptions

2.2.1

VCC

Digital supply voltage.

2.2.2

GND

Ground.

2.2.3

Port A (PA7:PA0)

Port A serves as analog inputs to the Analog-to-digital Converter.

Port A also serves as an 8-bit bi-directional I/O port with internal pull-up resistors (selected for

each bit). The Port A output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port A pins that are externally pulled low will source current if

the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes

active, even if the clock is not running.

Port A also serves the functions of various special features of the ATmega1284P as listed on

page 78.

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