ATmega1284P datasheet(46/380 Pages) ATMEL

46 / 380 page

8059D–AVR–11/09

ATmega1284P

8.12.2

MCUCR – MCU Control Register

• Bit 6 – BODS: BOD Sleep

The BODS bit must be written to logic one in order to turn off BOD during sleep, see Table 8-1

on page 40. Writing to the BODS bit is controlled by a timed sequence and an enable bit,

BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must first

be set to one. Then, to set the BODS bit, BODS must be set to one and BODSE must be set to

zero within four clock cycles.

The BODS bit is active three clock cycles after it is set. A sleep instruction must be executed

while BODS is active in order to turn off the BOD for the actual sleep mode. The BODS bit is

automatically cleared after three clock cycles.

• Bit 5 – BODSE: BOD Sleep Enable

BODSE enables setting of BODS control bit, as explained in BODS bit description. BOD disable

is controlled by a timed sequence.

8.12.3

PRR1 – Power Reduction Register 1

• Bit 7:1 - Res: Reserved

• Bit 0 - PRTIM3: Power Reduction Timer/Counter3

Writing a logic one to this bit shuts down the Timer/Counter3 module. When the Timer/Counter3

is enabled, operation will continue like before the shutdown.

8.12.4

PRR0 – Power Reduction Register 0

• Bit 7 - PRTWI: Power Reduction TWI

Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When

waking up the TWI again, the TWI should be re initialized to ensure proper operation.

• Bit 6 - PRTIM2: Power Reduction Timer/Counter2

Writing a logic one to this bit shuts down the Timer/Counter2 module in synchronous mode (AS2

is 0). When the Timer/Counter2 is enabled, operation will continue like before the shutdown.

Bit

0x35 (0x55)

JTD

BODS

BODSE

PUD

–

IVSEL

IVCE

MCUCR

Read/Write

R/W

Initial Value

Bit

543210

(0x65)

-----

PRTIM3

PRR1

Read/Write

RRRRR

R/W

Initial Value

000000

Bit

(0x64)

PRTWI

PRTIM2

PRTIM0

PRUSART1

PRTIM1

PRSPI

PRUSART0

PRADC

PRR0

Read/Write

R/W

Initial Value

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