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AS3525 데이터시트(PDF) 105 Page - ams AG |
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AS3525 데이터시트(HTML) 105 Page - ams AG |
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105 / 194 page ![]() AS3525-A/-B C22O22 Data Sheet, Confidential © 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Revision 1.13 105 - 194 Clock Constraining Different clocks are constraint to different maximum clock speeds. As the clock frequencies can be set by software, care must be taken not to exceed these maximum clock frequencies. Table 879 Clock Constraining Clock Domain Max. Freq. [MHz] Description FCLK 250 Processor Clock PCLK 65 AHB/APB bus clock MPMC_CLK 90 MPMC (external memory interface) clock I2SI MCLK 65 I2S input interface master clock I2SO MCLK 30 I2S output interface master clock USB CLK 48 USB interface clock IDE CLK 90 IDE interface clock MS CLK 40 Memory Stick Interface clock Figure 42 Clock Generation Unit Block Diagram |
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