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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 563 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 563 Page - Freescale Semiconductor, Inc |
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563 / 1348 page  Chapter 14 Voltage Regulator (S12VREG3V3V5) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 563 You can calculate the selected period depending of APICLK as: Period = 2*(APIR[11:0] + 1) * 0.1 ms or period = 2*(APIR[11:0] + 1) * bus clock period Table 14-8. Selectable Autonomous Periodical Interrupt Periods APICLK APIR[11:0] Selected Period 0 000 0.2 ms1 1 When trimmed within specified accuracy. See electrical specifications for details. 0 001 0.4 ms1 0 002 0.6 ms1 0 003 0.8 ms1 0 004 1.0 ms1 0 005 1.2 ms1 0 ..... ..... 0 FFD 818.8 ms1 0 FFE 819 ms1 0 FFF 819.2 ms1 1 000 2 * bus clock period 1 001 4 * bus clock period 1 002 6 * bus clock period 1 003 8 * bus clock period 1 004 10 * bus clock period 1 005 12 * bus clock period 1 ..... ..... 1 FFD 8188 * bus clock period 1 FFE 8190 * bus clock period 1 FFF 8192 * bus clock period |
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