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PC912XDP512F0MPVR 데이터시트(PDF) 1121 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 1121 Page - Freescale Semiconductor, Inc |
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1121 / 1348 page ![]() Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 1123 27.3.2.7 Flash Command Register (FCMD) The FCMD register is the Flash command register. All CMDB bits are readable and writable during a command write sequence while bit 7 reads 0 and is not writable. 27.3.2.8 Flash Control Register (FCTL) The FCTL register is the Flash control register. All bits in the FCTL register are readable but are not writable. 76543210 R0 CMDB W Reset 11000000 = Unimplemented or Reserved Figure 27-14. Flash Command Register (FCMD) Table 27-17. FCMD Field Descriptions Field Description 6-0 CMDB[6:0] Flash Command — Valid Flash commands are shown in Table 27-18. Writing any command other than those listed in Table 27-18 sets the ACCERR flag in the FSTAT register. Table 27-18. Valid Flash Command List CMDB[6:0] NVM Command 0x05 Erase Verify 0x06 Data Compress 0x20 Word Program 0x40 Sector Erase 0x41 Mass Erase 0x47 Sector Erase Abort 76543210 R NV7 NV6 NV5 NV4 NV3 NV2 NV1 NV0 W Reset F F F FFFFF = Unimplemented or Reserved Figure 27-15. Flash Control Register (FCTL) |
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