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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MC68HC705P9CS 데이터시트(PDF) 22 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS 데이터시트(HTML) 22 Page - Freescale Semiconductor, Inc |
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22 / 160 page  General Description Technical Data MC68HC705P9 — Rev. 4.0 22 General Description MOTOROLA • 128 bytes of user RAM • Bootloader ROM • Memory-mapped I/O registers • Fully static operation with no minimum clock speed • Power-saving stop, wait, and data-retention modes • Available packages: – 28-pin plastic dual in-line package (PDIP) – 28-pin small outline integrated circuit (SOIC) – 28-pin ceramic dual in-line package (CERDIP) 1.3 Programmable Options The options in Table 1-1 are programmable in the mask option register. Table 1-1. Programmable Options Feature Option COP watchdog Enabled or Disabled External interrupt pin triggering Negative-edge triggering only or Negative-edge and low-level triggering SIOP data format MSB first or LSB first Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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