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MC68HC705P9CS 데이터시트(PDF) 86 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS 데이터시트(HTML) 86 Page - Freescale Semiconductor, Inc |
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86 / 160 page ![]() Parallel Input/Output (I/O) Ports Technical Data MC68HC705P9 — Rev. 4.0 86 Parallel Input/Output (I/O) Ports MOTOROLA SDI — Serial Data Input When the SIOP is enabled, SDI is the SIOP data input. SDO — Serial Data Output When the SIOP is enabled, SDO is the SIOP data output. 7.4.2 Data Direction Register B (DDRB) Data direction register B determines whether each port B pin is an input or an output. NOTE: Enabling and then disabling the SIOP configures data direction register B for SIOP operation and can also change the port B data register. After disabling the SIOP, initialize data direction register B and the port B data register as your application requires. DDRB[7:5] — Data Direction Register B Bits These read/write bits control port B data direction. Reset clears DDRB[7:5], configuring all three port B pins as inputs. 1 = Corresponding port B pin configured as output 0 = Corresponding port B pin configured as input NOTE: Avoid glitches on port B pins by writing to the port B data register before changing data direction register B bits from 0 to 1. Figure 7-7 shows the I/O logic of port B. $0005 Bit 7 6 54321 Bit 0 Read: DDRB7 DDRB6 DDRB5 00000 Write: Reset: 00 000000 = Unimplemented Figure 7-6. Data Direction Register B (DDRB) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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