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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MC68HC705P9CS 데이터시트(PDF) 98 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS 데이터시트(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 160 page  Computer Operating Properly Watchdog (COP) Technical Data MC68HC705P9 — Rev. 4.0 98 Computer Operating Properly Watchdog (COP) MOTOROLA 8.7 Low-Power Modes The STOP and WAIT instructions put the MCU in low-power consumption standby modes. 8.7.1 Stop Mode The STOP instruction clears the COP watchdog counter. Upon exit from stop mode by external reset: • The counter begins counting from $0000. • The counter is cleared again after the 4064-cycle oscillator stabilization delay. Upon exit from stop mode by external interrupt: • The counter begins counting from $0000. • The counter is not cleared again after the oscillator stabilization delay and has a count of 4064 when the program resumes. 8.7.2 Wait Mode The COP watchdog continues to operate normally after a WAIT instruction. Software should periodically take the MCU out of wait mode and write to the COPC bit to prevent a COP watchdog timeout. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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