S5000PAL datasheet(27/112 Pages) INTEL

27 / 112 page

Functional Architecture

Intel

® Server Board S5000PAL / S5000XAL TPS

Revision 1.7

Intel order number: D31979-010

Table 2. Maximum 8 DIMM System Memory Configuration – x8 Single Rank

DRAM Technology x8

Single Rank

Maximum Capacity

Mirrored Mode

Maximum Capacity

Non-Mirrored Mode

256 Mb

1 GB

2 GB

512 Mb

2 GB

4 GB

1024 Mb

4 GB

8 GB

2048 Mb

8 GB

16 GB

Table 3. Maximum 8 DIMM System Memory Configuration – x4 Dual Rank

DRAM Technology x4

Dual Rank

Maximum Capacity

Mirrored Mode

Maximum Capacity

Non-Mirrored Mode

256 Mb

4 GB

8 GB

512 Mb

8 GB

16 GB

1024 Mb

16 GB

32 GB

2048 Mb

16 GB

32 GB

Note

: DDR2 DIMMs that are not fully buffered are NOT supported on this server board. See the Intel®

Server Board S5000PAL / S5000XAL Tested Memory List

for a complete list of supported memory for

this server board.

3.1.3.3

DIMM Population Rules and Supported DIMM Configurations

DIMM population rules depend on the operating mode of the memory controller, which is determined by

the number of DIMMs installed. DIMMs must be populated in pairs. DIMM pairs are populated in the

following DIMM slot order: A1 & B1, C1 & D1, A2 & B2, C2 & D2. DIMMs within a given pair must be

identical with respect to size, speed, and organization. However, DIMM capacities can be different

between different DIMM pairs.

For example, a valid mixed DIMM configuration may have 512MB DIMMs installed in DIMM Slots A1 &

B1, and 1GB DIMMs installed in DIMM slots C1 & D1.

Intel supported DIMM configurations for this server board are shown in the following table.

Supported and Validated configuration : Slot is populated

Supported but not validated configuration : Slot is

populated

Slot is not populated

Mirroring:

Y = Yes. Indicates that configuration supports Memory Mirroring.

Sparing:

Y(x) = Yes. Indicates that configuration supports Memory Sparing.

Where x =

0 : Sparing supported on Branch0 only

1 : Sparing supported on Branch1 only

0,1 : Sparing supported on both branches

Branch 0

Branch 1

Channel A

Channel B

Channel C

Channel D

DIMM_A1

DIMM_A2

DIMM_B1

DIMM B2

DIMM C1

DIMM C2

DIMM D1

DIMM D2

Mirroring

Possible

Sparing

Possible

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