MNSC140CORE datasheet(46/80 Pages) FREESCALE

부품명	MNSC140CORE

상세설명	Quad Core 16-Bit Digital Signal Processor

PDF	80 Pages

Scroll/Zoom	100%

제조업체	FREESCALE [Freescale Semiconductor, Inc]

홈페이지	http://www.freescale.com

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46 / 80 page

MSC8102 Quad Core Digital Signal Processor, Rev. 12

2-16

Freescale Semiconductor

Specifications

Figure 2-10 shows DSI asynchronous write signals timing.

Figure 2-11 shows DSI asynchronous broadcast write signals timing.

Figure 2-10.

Asynchronous Single and Dual Modes Write Timing Diagram

Figure 2-11.

Asynchronous Broadcast Write Timing Diagram

HD[0–63]

100

101

102

201

202

109

106

HWBSn

108

110

111

112

HDBSn1

HTA4

HTA3

Notes:

Used for single-strobe mode access.

Used for dual-strobe mode access.

HTA released at logic 0 (DCR[HTAAD] = 0) at end of access; used with pull-down implementation.

HTA released at logic 1 (DCR[HTAAD] = 1) at end of access; used with pull-up implementation.

HA[11–29]

HCS

HCID[0–4]

HDST

HRW1

HRDS

HD[0–63]

100

101

102

201

202

HWBSn

112

HDBSn1

Notes:

Used for single-strobe mode access.

Used for dual-strobe mode access.

HA[11–29]

HCS

HCID[0–4]

HDST

HRW1

HRDS2

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