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MSC8152SVT1000B 데이터시트(PDF) 59 Page - Freescale Semiconductor, Inc

부품명 MSC8152SVT1000B
상세설명  Dual-Core Digital Signal Processor
PDF  68 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MSC8152SVT1000B 데이터시트(HTML) 59 Page - Freescale Semiconductor, Inc

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Hardware Design Considerations
MSC8152 Dual-Core Digital Signal Processor Data Sheet, Rev. 1
Freescale Semiconductor
59
3.5.1
DDR Memory Related Pins
This section discusses the various scenarios that can be used with either of the MSC8152 DDR ports.
Note:
The signal names in Table 40, Table 41 and Table 42 are generic names for a DDR SDRAM interface. For actual pin
names refer to Table 1.
3.5.1.1
DDR Interface Is Not Used
Table 40. Connectivity of DDR Related Pins When the DDR Interface Is Not Used
Signal Name
Pin Connection
MDQ[0–63]
NC
MDQS[7–0]
NC
MDQS[7–0]
NC
MA[15–0]
NC
MCK[0–2]
NC
MCK[0–2]
NC
MCS[1–0]
NC
MDM[7–0]
NC
MBA[2–0]
NC
MCAS
NC
MCKE[1–0]
NC
MODT[1–0]
NC
MMDIC[1–0]
NC
MRAS
NC
MWE
NC
MECC[7–0]
NC
MDM8
NC
MDQS8
NC
MDQS8
NC
MAPAR_OUT
NC
MAPAR_IN
NC
MVREF3
NC
GVDD1/GVDD23
NC
Notes:
1.
For the signals listed in this table, the initial M stands for M1 or M2 depending on which DDR controller is not used.
2.
If the DDR controller is not used, disable the internal DDR clock by setting the appropriate bit in the System Clock Control
Register (SCCR) and put all DDR I/O in sleep mode by setting DRx_GCR[DDRx_DOZE] (for DDR controller x). See the
Clocks and General Configuration Registers chapters in the MSC8152 Reference Manual for details.
3.
For MSC8152 Revision 1 silicon, these pins were connected to GND. For newer revisions of the MSC8152, connecting these
pins to GND increases device power consumption.



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