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MIC3003GFL 데이터시트(PDF) 55 Page - Micrel Semiconductor

부품명 MIC3003GFL
상세설명  FOM Management IC with Internal Calibration
PDF  74 Pages
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제조업체  MICREL [Micrel Semiconductor]
홈페이지  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

MIC3003GFL 데이터시트(HTML) 55 Page - Micrel Semiconductor

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Micrel, Inc.
MIC3003GFL
July 2010
55
M9999-072910-A
hbwhelp@micrel.com or (408) 955-1690
Bit(s)
Function
Operation
D[7-3]
Reserved
Read-only; these bits always return 00000.
D[2:0]
RESETOUT
Controls the reset output at pin 2
(QGPO) when Reset mode is
selected (OEMCFG3-7 set to 1)
By default, these three bits are 000, and the QGPO output
is undriven.
If RESET mode is selected in OEMCFG3:
When the three bits are written to 111, QGPO’s open-drain
output will be driven low for 125 μs (typical), after which
QGPO reenters the undriven state.
The RESETOUT field is cleared from 111 to 000 22.5 ms
(typical) after the de-assertion edge of QGPO. Other values
of this delay may be selected in the TRSTCLR[2:0] field in
OEMCFG2.
If Reset mode in OEMCFG3 is not selected, these three
bits have no function.
OEM Configuration Register 0 (OEMCFG0)
D[7]
RST
write only
D[6]
QGPOS
read/write
D[5]
DFLT
read-only
D[4]
OE
reserved
D[3]
MODREF
reserved
D[2]
VAUX[2]
read/write
D[1]
VAUX[1]
read/write
D[0]
VAUX[0]
read/write
Default value
0000 0000b = 00h
Serial address
A6h
Byte address
00 = 00h
A write to OEMCFG0 will result in any A/D conversion in progress being aborted and the result discarded. The A/D will begin a
new conversion sequence once the write operation is complete.
All bits in OEMCFG0 are non-volatile except DFLT and RST. A valid OEM password is required for access to this register.
Bit(s)
Function
Operation
D[7]
RST
0 = no action; 1 = reset
Issuing a software reset by setting RST high is equivalent to
a full power cycle of the MIC3003.
D[6]
QGPOS
Determines the state of QGPO in
GPO mode
If OEMCFG3 bit 7 (QGPOM) is low, this bit determines
whether the QGPO output is high (undriven) or low (driven-
open-drain).
If QGPOM is high (Reset mode), this bit has no function
D[5]
DFLT
Diode fault flag.
1 = diode fault; 0 = OK.
D[4]
OE
Output enable for SHDN, VMOD,
and VBIAS.
1 = enabled; 0 = hi-Z
D[3]
MODREF
Selects whether VMOD is
referenced to ground or VDD.
1 = VDD; 0 = GND
D[2:0]
VAUX[2:0]
Selects the voltage reported in
VINh:VINl.
000 = VIN
001 = VDDA
010 = VBIAS
011 = VMOD
100 = APCDAC
101 = MODDAC
110 = FLTDAC



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