MIC3003GFL datasheet(9/74 Pages) MICREL

9 / 74 page

Micrel, Inc.

MIC3003GFL

July 2010

M9999-072910-A

hbwhelp@micrel.com or (408) 955-1690

Pin Number

Pin Name

Pin Function

SHDN/TXFIN

Digital output/Input; programmable polarity. When used as shutdown output (SHDN), OEMCFG3

bit 2 set to 0, SHDN is asserted at the detection of a fault condition if OEMCFG4 bit 7 is set to 0. If

OEMCFG4 bit 7 is set to 1, a fault condition will not assert SHDN. When programmed as TXFIN, it

is an input for external fault signals to be OR’ed with the internal fault sources to drive TXFAULT.

VILD+

Analog Input. Multiplexed A/D input for monitoring laser bias current via a sense resistor (signal

input); accommodates inputs referenced to VDD or GND (see pin 14 description).

VILD–

Analog Input. Reference terminal for the multiplexed pseudo-differential A/D converter inputs for

monitoring laser bias current via a sense resistor (VILD+ is the sensing input). Tie to VDD or GND

to reference the voltage sensed on VILD+ to VDD or GND, respectively.

VDDA

Power supply input for analog functions.

GNDA

Ground return for analog functions.

VMPD

Analog Input. Multiplexed A/D converter input for monitoring transmitted optical power via a

monitor photodiode. In most applications, VMPD will be connected directly to FB. The input range

is 0 - VREF or 0 - VREF/4 depending upon the setting of the APC configuration bits

Analog Input. Feedback voltage for the APC loop op-amp. Polarity and scale are programmable

via the APC configuration bits I OEMCFG1. Connect to VBIAS if APC is not used.

VMOD

Analog Output. Buffered DAC output to set the modulation current on the laser driver IC. Operates

with either a 0– VREF or a (VDD–VREF) – VDD output swing so as to generate either a ground-

referenced or a VDD referenced programmed voltage. A simple external circuit can be used to

generate a programmable current for those drivers that require a current rather than a voltage

input.

VMOD–

Analog input. This pin is the inverting terminal of the VMOD buffer op-amp. Connect to VMOD

(gain = 1) or a feedback resistor network to set a different gain value.

VBIAS

Analog output. Buffered DAC output capable of sourcing or sinking up to 10mA under control of

the APC function to drive an external transistor or the APCSET pin of a laser diode driver for laser

diode DC bias. The output and feedback polarity are programmable to accommodate either an

NPN or a PNP transistor to drive a common-anode or common-cathode laser diode.

COMP

Analog output. Compensation terminal for the APC loop. Connect a capacitor between this pin and

GNDA or VDDA with the appropriate value to tune the APC loop time constant to a desirable value.

RRSOUT/

GPO

Digital Output. Open-Drain or push-pull.

If OEMCFG3 bit 4 is set to 0, RRSOUT is selected. It represents the receiver rate select as per

SFF. This output is controlled by the SRS0 bit OR’ed with RS0 input and is open drain only.

If OEMCFG3 bit 4 is set to 1, GPO is selected. General-purpose, non-volatile output, it is

controlled by the GPO configuration bits in OEMCFG3.

RXLOS/

TRSOUT

Digital output. This programmable polarity, open-drain outputs has two purposes:

If OEMCFG6 bit 2 = 0, indicates the loss of the received signal as indicated by a level of received

optical power below the programmed RXLOS comparator threshold; may be wire-OR’ed with

external signals. Normal operation is indicated by a low level when OEMCFG6 bit 3 is set to 0 and

a high level when OEMCFG6 bit 3 is set to 1. RXLOS is de-asserted when VRX > LOSFLTn. The

LOS bit reflects the state of RXLOS whether driven by the MIC3003 or an external circuit.

If OEMCFG6 bit 2 = 1, TRSOUT is selected. This signal represents the transmitter rate select as

per the SFF specification. This output is controlled by the SRS1 bit OR’ed with the RS1 input.

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