| 전자부품 데이터시트 검색엔진 |
|
MIC3003GFL 데이터시트(PDF) 8 Page - Micrel Semiconductor |
|
|
|||||||||||||||||||||||||||||
MIC3003GFL 데이터시트(HTML) 8 Page - Micrel Semiconductor |
|
8 / 74 page ![]() Micrel, Inc. MIC3003GFL July 2010 8 M9999-072910-A hbwhelp@micrel.com or (408) 955-1690 Pin Configuration 24-Pin MLF ® (ML) Pin Description (MIC3003GFL only) Pin Number Pin Name Pin Function 1 VDDD Power supply input for digital functions. 2 QGPO Open-drain output. Can be selected (via OEMCFG3 bit 7) to be an open-drain GPO or an active- low, open-drain, pulsed reset signal output controlled by the status of bits [0-2] of byte A2h: FFh. 3 GNDD Ground return for digital functions. 4 RS0 Digital input. Receiver Rate Select input. OR’ed with soft rate select bit SRS0 to determine the state of the RRSOUT pin. The state of this pin is always reflected in the RS0S bit. 5 VIN/INT If bit 4 (IE) in the USRCTL register is set to 0 (its default value), this pin is configured as an analog input. If IE bit is set to 1, this pin is configured as an open-drain output. Analog input: Multiplexed A/D input for monitoring supply voltage, with a 0V to 5.5V input range. Open-drain output: outputs the internally generated active-low interrupt signal /INT. 6 CLK Digital input. Serial clock input. 7 DATA Digital I/O, open-drain, bi-directional serial data input/output. 8 TXDISABLE Digital input; Active high. The transmitter is disabled when this input is high or the STXDIS bit is set to 1. The state of this input is always reflected in the TXDIS bit. 9 TXFAULT Digital Output; Open-Drain, with programmable polarity. If OEMCFG5 bit 4 is set to 0, a high level indicates a hardware fault impeding transmitter operation. If OEMCFG5 bit 4 is set to 1, a low level indicates a hardware fault impeding transmitter operation. The state of this pin is always reflected in the TXFLT bit. 10 RS1 Digital Input; Transmitter Rate Select Input; OR’ed with soft rate select bit SRS1 to determine the state of the TRSOUT pin. The state of this pin is always reflected in the RS1S bit. 11 VRX Analog Input. Multiplexed A/D converter input for monitoring received optical power. The input range is 0 to VREF. A 5-bit programmable EEPOT on this pin provides coarse calibration and ranging of the RX power measurement. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |