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IMX53CEC 데이터시트(PDF) 49 Page - Freescale Semiconductor, Inc

부품명 IMX53CEC
상세설명  Applications Processors for Consumer Products
PDF  204 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

IMX53CEC 데이터시트(HTML) 49 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
i.MX53xD Applications Processors for Consumer Products, Rev. 2
Freescale Semiconductor
49
Lower frequency operation can be supported for most available devices in
the market, relying on data lines Bus-Keeper logic. This depends on device
behavior on the data bus in the time interval between data output valid to
data output high-Z state. In NAND device parameters this period is marked
between trhoh and trhz (RE_B high to output high-Z). In most devices, the
data transition from valid value to high-Z occurs without going through
other states. Setting the data bus pads to Bus-Keeper mode in the IOMUXC
registers, keeps the data bus valid internally after the specified hold time,
allowing proper capturing with slower clock.
Figure 10. Command Latch Cycle Timing
Figure 11. Address Latch Cycle Timing
NFCLE
NFCE_B
NFWE_B
NFIO[7:0]
command
NF9
NF8
NF1
NF2
NF5
NF3
NF4
NFCE_B
NFWE_B
NFALE
NFIO[7:0]
Address
NF9
NF8
NF5
NF3
NF4
NF6
NF11
NF10
NF7



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