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MPC5673K 데이터시트(PDF) 108 Page - Freescale Semiconductor, Inc |
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MPC5673K 데이터시트(HTML) 108 Page - Freescale Semiconductor, Inc |
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108 / 140 page ![]() MPC5675K Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 108 Figure 27. External VREG mode, RESET_SUP rises after VDD_HV_xxx are stable Figure 28. External VREG mode, RESET_SUP rises with VDD_HV_xxx NOTE In case RESET_SUP has reached a valid high level before VDD_HV_IO is stable, the reset sequence will start as documented in Figure 28 as the RESET_SUP input circuitry needs a valid VDD_HV_IO rail in order to detect a high level on RESET_SUP. VDD_HV_PMU V t 0.8 × VDD_HV_IO RESET_SUP V t TReset, min starts here TReset, max starts here VDD_HV_IO VDD_HV_FLASH VDD_HV_ADV 0.2 × VDD_HV_IO VDD_HV_PMU V t LvdReg + 3.5% RESET_SUP V t TReset, min starts here TReset, max starts here VDD_HV_IO VDD_HV_FLASH VDD_HV_ADV LvdReg – 3.5% |
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