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LPC4350 데이터시트(PDF) 87 Page - NXP Semiconductors |
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LPC4350 데이터시트(HTML) 87 Page - NXP Semiconductors |
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87 / 145 page ![]() LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Objective data sheet Rev. 2.1 — 23 September 2011 87 of 145 NXP Semiconductors LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 microcontroller 7.22.8 Reset Generation Unit (RGU) The RGU allows generation of independent reset signals for individual blocks and peripherals on the LPC4350/30/20/10. 7.22.9 Power control The LPC4350/30/20/10 feature several independent power domains to control power to the core and the peripherals (see Figure 11). The RTC and its associated peripherals (the alarm timer, the CREG block, the OTP controller, the back-up registers, and the event router) are located in the RTC power-domain which can be powered by a battery supply or the main regulator. A power selector switch ensures that the RTC block is always powered on. The LPC4350/30/20/10 support four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down. Fig 11. Power domains REAL-TIME CLOCK BACKUP REGISTERS RESET/WAKE-UP CONTROL REGULATOR 32 kHz OSCILLATOR ALWAYS-ON/RTC POWER DOMAIN MAIN POWER DOMAIN RTCX1 VBAT VDDREG RTCX2 VDDIO VSS to memories, peripherals, oscillators, PLLs to cores to I/O pads ADC DAC OTP ADC POWER DOMAIN OTP POWER DOMAIN USB0 POWER DOMAIN VDDA VSSA VPP USB0 USB0_VDDA3V_DRIVER USB0_VDDA3V3 LPC43xx ULTRA LOW-POWER REGULATOR POWER SELECTOR ALARM RESET WAKEUP0/1/2/3 to RTC domain peripherals 002aag378 to RTC I/O pads |
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