AFS090 datasheet(225/334 Pages) MICROSEMI

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Fusion Family of Mixed Signal FPGAs

R e visio n 2

2 - 209

SSTL3 Class I

Stub-Speed Terminated Logic for 3.3 V memory bus standard (JESD8-8). Fusion devices support Class

I. This provides a differential amplifier input buffer and a push-pull output buffer.

Timing Characteristics

Table 2-162 • Minimum and Maximum DC Input and Output Levels

SSTL3 Class I

VIL

VIH

VOL

VOH

IOL

IOH

IOSL

IOSH

IIL1

IIH2

Drive

Strength

Min.

Max.

Min.

Max.

Min.

VmA

Max.

mA3

Max.

mA3

µA4 µA4

14 mA

–0.3 VREF – 0.2 VREF + 0.2 3.6

0.7

VCCI – 1.1

Notes:

1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.

2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is

larger when operating outside recommended ranges.

3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.

4. Currents are measured at 85°C junction temperature.

Figure 2-130 • AC Loading

Table 2-163 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring Point* (V)

VREF (typ.) (V)

VTT (typ.) (V)

CLOAD (pF)

VREF – 0.2

VREF + 0.2

1.5

1.485

Note:

*Measuring point = Vtrip. See Table 2-90 on page 2-168 for a complete table of trip points.

Test Point

30 pF

SSTL3

Class I

VTT

Table 2-164 • SSTL3 Class I

Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,

Worst-Case VCCI = 3.0 V, VREF = 1.5 V

Speed

Grade

tDOUT

tDP

tDIN

tPY

tEOUT

tZL

tZH

tLZ

tHZ

tZLS

tZHS

Units

Std.

0.66

2.31

0.04

1.25

0.43

2.35

1.84

4.59

4.07

–1

0.56

1.96

0.04

1.06

0.36

2.00

1.56

3.90

3.46

–2

0.49

1.72

0.03

0.93

0.32

1.75

1.37

3.42

3.04

Note:

For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on

page 3-9.

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