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R5F10RF8AFP 데이터시트(PDF) 55 Page - Renesas Technology Corp

부품명 R5F10RF8AFP
상세설명  Integrated LCD controller/driver, True Low Power Platform (as low as 75 關A/MHz, and 0.64 關A for RTC LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
PDF  76 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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RL78/L12
2. ELECTRICAL SPECIFICATIONS (TARGET)
Page 55 of 73
R01DS0157EJ0001 Rev.0.01
2012.02.20
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
Caution
The pins mounted depend on the product.
Refer to 1.3.1
32-pin products to 1.3.5
64-pin
products.
(2) When AVREF (+) = VDD (ADREFP1 = 0, ADREFP0 = 0), AVREF (−) = VSS (ADREFM = 0), target ANI pin : ANI0,
ANI1, ANI16 to ANI23
(TA =
−40 to +85°C, 1.6 V ≤ EVDD = VDD ≤ 5.5 V, VSS = EVSS = 0 V, Reference voltage (+) = VDD, Reference
voltage (
−) = VSS)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Resolution
RES
8
10
bit
1.8 V
≤ VDD ≤ 5.5 V
1.2
±7.0
LSB
Overall error
Notes 1, 2
AINL
10-bit resolution
1.6 V
≤ VDD ≤ 5.5 V
1.2
±10.5
LSB
3.6 V
≤ VDD ≤ 5.5 V
2.125
39
μs
2.7 V
≤ VDD ≤ 5.5 V
3.1875
39
μs
1.8 V
≤ VDD ≤ 5.5 V
17
39
μs
Conversion time
tCONV
10-bit resolution
1.6 V
≤ VDD ≤ 5.5 V
57
95
μs
1.8 V
≤ VDD ≤ 5.5 V
±0.60
%FSR
Zero-scale error
Notes 1, 2
EZS
10-bit resolution
1.6 V
≤ VDD ≤ 5.5 V
±0.85
%FSR
1.8 V
≤ VDD ≤ 5.5 V
±0.60
%FSR
Full-scale error
Notes 1, 2
EFS
10-bit resolution
1.6 V
≤ VDD ≤ 5.5 V
±0.85
%FSR
1.8 V
≤ VDD ≤ 5.5 V
±4.0
LSB
Integral linearity error
Note 1
ILE
10-bit resolution
1.6 V
≤ VDD ≤ 5.5 V
±6.5
LSB
1.8 V
≤ VDD ≤ 5.5 V
±2.0
LSB
Differential linearity error
Note 1
DLE
10-bit resolution
1.6 V
≤ VDD ≤ 5.5 V
±2.5
LSB
ANI0, ANI1
0
VDD
V
VAIN
ANI16 to ANI23
0
EVDD
V
Analog input voltage
VBGR
Note3
2.4 V
≤ VDD ≤ 5.5 V
1.38
1.45
1.5
V
Notes 1. Excludes quantization error (
±1/2 LSB).
2. This value is indicated as a ratio (%FSR) to the full-scale value.
3. HS (high-speed main) mode only



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