전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

R5F10RF8AFP 데이터시트(PDF) 65 Page - Renesas Technology Corp

부품명 R5F10RF8AFP
상세설명  Integrated LCD controller/driver, True Low Power Platform (as low as 75 關A/MHz, and 0.64 關A for RTC LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
PDF  76 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10RF8AFP 데이터시트(HTML) 65 Page - Renesas Technology Corp

Back Button R5F10RF8AFP Datasheet HTML 61Page - Renesas Technology Corp R5F10RF8AFP Datasheet HTML 62Page - Renesas Technology Corp R5F10RF8AFP Datasheet HTML 63Page - Renesas Technology Corp R5F10RF8AFP Datasheet HTML 64Page - Renesas Technology Corp R5F10RF8AFP Datasheet HTML 65Page - Renesas Technology Corp R5F10RF8AFP Datasheet HTML 66Page - Renesas Technology Corp R5F10RF8AFP Datasheet HTML 67Page - Renesas Technology Corp R5F10RF8AFP Datasheet HTML 68Page - Renesas Technology Corp R5F10RF8AFP Datasheet HTML 69Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 65 / 76 page
background image
RL78/L12
2. ELECTRICAL SPECIFICATIONS (TARGET)
Page 65 of 73
R01DS0157EJ0001 Rev.0.01
2012.02.20
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
Caution
The pins mounted depend on the product.
Refer to 1.3.1
32-pin products to 1.3.5
64-pin
products.
2.8 Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics
(TA =
−40 to +85°C)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Data retention supply voltage
VDDDR
1.47
Note
5.5
V
Note The value depends on the POR detection voltage.
When the voltage drops, the data is retained before a
POR reset is effected, but data is not retained when a POR reset is effected.
VDD
STOP instruction execution
Standby release signal
(interrupt request)
STOP mode
Data retention mode
VDDDR
Operation mode
2.9 Flash Memory Programming Characteristics
(TA =
−40 to +85°C, 1.8 V ≤ EVDD = VDD ≤ 5.5 V, VSS = EVSS = 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
CPU/peripheral hardware clock
frequency
fCLK
1.8 V
≤ VDD ≤ 5.5 V
1
24
MHz
Number of code flash rewrites
Retained for 20 years
(Self/serial
programming)
Note
1,000
Retained for 1 years
(Self/serial
programming)
Note
1,000,000
Number of data flash rewrites
Cerwr
1 erase + 1 write after
the erase is regarded
as 1 rewrite.
The retaining years
are until next rewrite
after the rewrite.
Retained for 5 years
(Self/serial
programming)
Note
100,000
Times
Note
When using flash memory programmer and Renesas Electronics self programming library
Remark
When updating data multiple times, use the flash memory as one for updating data.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com