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AD9557/PCBZ 데이터시트(PDF) 6 Page - Analog Devices

부품명 AD9557/PCBZ
상세설명  Dual Input Multiservice
PDF  92 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9557/PCBZ 데이터시트(HTML) 6 Page - Analog Devices

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AD9557
Data Sheet
Rev. A | Page 6 of 92
LOGIC OUTPUTS (M3 TO M0, IRQ)
Table 5.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
LOGIC OUTPUTS (M3 to M0, IRQ)
Output High Voltage (VOH)
DVDD3 − 0.4
V
IOH = 1 mA
Output Low Voltage (VOL)
0.4
V
IOL = 1 mA
IRQ Leakage Current
Open-drain mode
Active Low Output Mode
−200
μA
VOH = 3.3 V
Active High Output Mode
100
μA
VOL = 0 V
SYSTEM CLOCK INPUTS (XOA, XOB)
Table 6.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SYSTEM CLOCK MULTIPLIER
Output Frequency Range
750
805
MHz
The VCO range may place limitations on
nonstandard system clock input frequencies
Phase Frequency Detector (PFD) Rate
150
MHz
Frequency Multiplication Range
2
255
Assumes valid system clock and PFD rates
SYSTEM CLOCK REFERENCE INPUT PATH
Input Frequency Range
10
400
MHz
Minimum Input Slew Rate
20
V/μs
Minimum limit imposed for jitter
performance
Common-Mode Voltage
1.05
1.16
1.25
V
Internally generated
Differential Input Voltage Sensitivity
250
mV p-p
Minimum voltage across pins required to
ensure switching between logic states;
the instantaneous voltage on either pin
must not exceed the supply rails;
can accommodate single-ended input by
ac grounding of complementary input;
1 V p-p recommended for optimal jitter
performance
System Clock Input Doubler Duty Cycle
This is the amount of duty cycle variation
that can be tolerated on the system clock
input to use the doubler
System Clock Input = 50 MHz
45
50
55
%
System Clock Input = 20 MHz
46
50
54
%
System Clock Input = 16 MHz to 20 MHz
47
50
53
%
Input Capacitance
3
pF
Single-ended, each pin
Input Resistance
4.2
CRYSTAL RESONATOR PATH
Crystal Resonator Frequency Range
10
50
MHz
Fundamental mode, AT cut crystal
Maximum Crystal Motional Resistance
100
Ω



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