AD9557SLASHPCBZ datasheet(12/92 Pages) AD

12 / 92 page

AD9557

Data Sheet

Rev. A | Page 12 of 92

SERIAL PORT SPECIFICATIONS—SPI MODE

Table 15.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

Input Logic 1 Voltage

2.2

Input Logic 0 Voltage

1.2

Input Logic 1 Current

μA

Input Logic 0 Current

μA

Input Capacitance

SCLK

Internal 30 kΩ pull-down resistor

Input Logic 1 Voltage

2.2

Input Logic 0 Voltage

0.8

1.2

Input Logic 1 Current

200

μA

Input Logic 0 Current

μA

Input Capacitance

SDIO

As an Input

Input Logic 1 Voltage

2.2

Input Logic 0 Voltage

1.2

Input Logic 1 Current

μA

Input Logic 0 Current

μA

Input Capacitance

As an Output

Output Logic 1 Voltage

DVDD3 − 0.6

1 mA load current

Output Logic 0 Voltage

0.4

1 mA load current

SDO

Output Logic 1 Voltage

DVDD3 − 0.6

1 mA load current

Output Logic 0 Voltage

0.4

1 mA load current

TIMING

SCLK

Clock Rate, 1/tCLK

MHz

Pulse Width High, tHIGH

Pulse Width Low, tLOW

SDIO to SCLK Setup, tDS

SCLK to SDIO Hold, tDH

SCLK to Valid SDIO and SDO, tDV

CS to SCLK Setup (tS)

CS to SCLK Hold (tC)

CS Minimum Pulse Width High

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