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FXOS8700CQ 데이터시트(PDF) 13 Page - Freescale Semiconductor, Inc

부품명 FXOS8700CQ
상세설명  6-Axis Xtrinsic Sensor with Integrated
PDF  86 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

FXOS8700CQ 데이터시트(HTML) 13 Page - Freescale Semiconductor, Inc

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Sensors
Freescale Semiconductor, Inc.
13
5
Digital Interfaces
5.1
I2C interface characteristics
Figure 5. I2C slave timing diagram
Table 8. I2C slave timing values(1)
1. All values referred to VIH (min) and VIL (max) levels.
Parameter
Symbol
I2C Fast Mode
Unit
Min
Max
SCL Clock Frequency
fSCL
0
400
kHz
Bus Free Time between STOP and START condition
tBUF
1.3
μs
(Repeated) START Hold Time
tHD;STA
0.6
μs
(Repeated) START Setup Time
tSU;STA
0.6
μs
STOP Condition Setup Time
tSU;STO
0.6
μs
SDA Data Hold Time
tHD;DAT
0.05
0.9(2)
2. This device does not stretch the LOW period (tLOW) of the SCL signal.
μs
SDA Valid Time(3)
3. tVD;DAT = time for Data signal from SCL LOW to SDA output.
tVD;DAT
0.9(2)
μs
SDA Valid Acknowledge Time(4)
4. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse).
tVD;ACK
0.9(2)
μs
SDA Setup Time
tSU;DAT
100
ns
SCL Clock Low Time
tLOW
1.3
μs
SCL Clock High Time
tHIGH
0.6
μs
SDA and SCL Rise Time
tr
20 + 0.1 Cb
(5)
5. Cb = total capacitance of one bus line in pF.
300
ns
SDA and SCL Fall Time
tf
20 + 0.1 Cb
(5)
300
ns
Pulse width of spikes on SDA and SCL that must be suppressed by
internal input filter
tSP
050
ns
handbook, full pagewidth
MSC610
S
Sr
tSU;STO
tSU;STA
tHD;STA
tHIGH
tLOW
tSU;DAT
tHD;DAT
tf
SDA
SCL
P
S
tBUF
tr
tf
tr
tSP
tHD;STA



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