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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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FXOS8700CQ 데이터시트(PDF) 15 Page - Freescale Semiconductor, Inc |
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FXOS8700CQ 데이터시트(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 86 page  Sensors Freescale Semiconductor, Inc. 15 Multiple byte write The FXOS8700CQ automatically increments the register address write pointer after a write command is received. Therefore, after following the steps of a single byte write, multiple bytes of data can be written to sequential registers after each FXOS8700CQ acknowledgment (ACK) is received. Figure 6. I2C timing diagram < Single Byte Read > Master ST Device Address[6:0] W Register Address[7:0] SR Device Address[6:0] R NAK SP Slave AK AK AK Data[7:0] < Multiple Byte Read > Master ST Device Address[6:0] W Register Address[7:0] SR Device Address[6:0] R AK Slave AK AK AK Data[7:0] Master AK AK NAK SP Slave Data[7:0] Data[7:0] Data[7:0] < Multiple Byte Write > Master ST Device Address[6:0] W Register Address[7:0] Data[7:0] Data[7:0] SP Slave AK AK AK AK < Single Byte Write > Master ST Device Address[6:0] W Register Address[7:0] Data[7:0] SP Slave AK AK AK Legend ST: Start Condition SP: Stop Condition NAK: No Acknowledge W: Write = 0 SR: Repeated Start Condition AK: Acknowledge R: Read = 1 |
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