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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MPC5744P 데이터시트(PDF) 98 Page - Freescale Semiconductor, Inc |
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MPC5744P 데이터시트(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 114 page  MPC5744P Data Sheet, Rev. 0.3 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 98 Figure 28. External interrupt timing 3.17.5 DSPI timing Table 45. DSPI timing No. Symbol C Parameter Conditions Min Max Unit 1tSCK CC D DSPI cycle time Master (MTFE = 0) 62 — ns CC D Slave (MTFE = 0) 62 — CC D Slave Receive Only Mode1 16 — 2tCSC CC D PCS to SCK delay — 16 — ns 3tASC CC D After SCK delay — 16 — ns 4tSDC CC D SCK duty cycle — tSCK/2 - 10 tSCK/2 + 10 ns 5tA CC D Slave access time SS active to SOUT valid — 40 ns 6tDIS CC D Slave SOUT disable time SS inactive to SOUT High-Z or invalid — 10 ns 7tPCSC CC D PCSx to PCSS time — 13 — ns 8tPASC CC D PCSS to PCSx time — 13 — ns 9tSUI CC D Data setup time for inputs Master (MTFE = 0) 20 — ns Slave 2— Master (MTFE = 1, CPHA = 0) 5— Master (MTFE = 1, CPHA = 1) 20 — 10 tHI CC D Data hold time for inputs Master (MTFE = 0) –5 — ns Slave 4 — Master (MTFE = 1, CPHA = 0) 11 — Master (MTFE = 1, CPHA = 1) –5 — 11 tSUO CC D Data valid (after SCK edge) Master (MTFE = 0) — 4 ns Slave — 23 Master (MTFE = 1, CPHA = 0) — 12 Master (MTFE = 1, CPHA = 1) — 4 IRQ 1 2 3 |
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