CY2DP818

Document Number: 38-07061 Rev. *D

Page 4 of 13

Table 1. Input Receiver Configuration for Differential or LVTTL/LVCMOS

InConfig (Pin 7)

Input Receiver Family

Input Receiver Type

1

LVTTL or LVCMOS

Single ended, non-inverting or inverting, void of bias resistors

0

LVDS or LVPECL

Differential, void of internal termination

Table 2. Single ended LVTTL/LVCMOS Input Logic (InConfig = 1)

Input A (+) Pin 10

Input B (–) Pin 11

Output Clock QnA Pins

Input

Ground

True

Input

VDD

Invert

Ground

Input

Invert

VDD

Input

True