전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

CY2DP818ZXC 데이터시트(PDF) 6 Page - Cypress Semiconductor

부품명 CY2DP818ZXC
상세설명  1:8 Clock Fanout Buffer
PDF  13 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2DP818ZXC 데이터시트(HTML) 6 Page - Cypress Semiconductor

Back Button CY2DP818ZXC Datasheet HTML 2Page - Cypress Semiconductor CY2DP818ZXC Datasheet HTML 3Page - Cypress Semiconductor CY2DP818ZXC Datasheet HTML 4Page - Cypress Semiconductor CY2DP818ZXC Datasheet HTML 5Page - Cypress Semiconductor CY2DP818ZXC Datasheet HTML 6Page - Cypress Semiconductor CY2DP818ZXC Datasheet HTML 7Page - Cypress Semiconductor CY2DP818ZXC Datasheet HTML 8Page - Cypress Semiconductor CY2DP818ZXC Datasheet HTML 9Page - Cypress Semiconductor CY2DP818ZXC Datasheet HTML 10Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 13 page
background image
CY2DP818
Document Number: 38-07061 Rev. *D
Page 6 of 13
DC Electrical Specifications
Table 4. LVDS Input, VDD = 3.3 V ± 5%, TA = 0C to 70 C or –40 C to 85 C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VID
Magnitude of Differential Input
Voltage
100
–
600
mV
VIC
Common-mode of Differential
Input VoltageIVIDI (min and max)
IVIDI/2
2.4–(IVIDI/2)
V
VIH
Input High Voltage
Guaranteed Logic High Level
2
–
–
V
VIL
Input Low Voltage
Guaranteed Logic Low Level
–
–
0.8
V
IIH
Input High Current
VDD = Max, VIN = VDD
–±10
±20
A
IIL
Input Low Current
VDD = Max, VIN = VSS
–±10
±20
A
Table 5. LVPECL Input, VDD = 3.3 V ± 5%, TA = 0 C to 70 C or –40 C to 85 C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VID
Differential Input Voltage p-p
Guaranteed Logic High Level
400
–
2600
mV
VIH
Input High Voltage
Guaranteed Logic High Level
2.15
–
2.4
V
VIL
Input Low Voltage
Guaranteed Logic Low Level
1.5
–
1.8
V
IIH
Input High Current
VDD = Max, VIN = VDD
–±10
±20
A
IIL
Input Low Current
VDD = Max, VIN = VSS
–±10
±20
A
VCM
Common-mode Voltage
–
–
225
mV
Table 6. LVTTL/LVCMOS Input, VDD = 3.3 V ± 5%, TA = 0 C to 70 C or –40 C to 85 C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VIH
Input High Voltage
2
–
–
V
VIL
Input Low Voltage
–
–
0.8
V
IIH
Input High Current
VDD = Max, VIN = 2.7 V
––1
A
IIL
Input Low Current
VDD = Max, VIN = 0.5 V
–
–
–1
A
II
Input High Current
VDD = Max, VIN = VDD(Max)
––
20
A
VIK
Clamp Diode Voltage
VDD = Min, IIN = –18 mA
–
–0.7
–1.2
V
VH
Input Hysteresis
–
80
–
mV



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com