 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
TNETX15VE 데이터시트(PDF) 5 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TNETX15VE 데이터시트(HTML) 5 Page - Texas Instruments |
|
|
5 / 113 page  TNETX15VE VLAN-ENGINE ADDRESS-LOOKUP DEVICE SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 internal 4K × 16 SRAM The TNETX15VE integrates an internal 4K × 16 SRAM that is used to store the following: • A one-address-per-port FIFO as part of the bus watcher • A 32-address FIFO for bridge protocol data unit (BPDU) sources during spanning-tree resolution • A two-word data entry for each address it has learned The addresses that the TNETX15VE recognizes are stored as a series of pointers in external ( ×16) static RAM. The size of the internal RAM imposes a hard limit to the number of addresses that the TNETX15VE can support. IEEE Std 1149.1 test port (JTAG) The test-access port is composed of five terminals that are used to interface serially with the device and the board on which it is installed for boundary-scan testing. The TNETX15VE is fully JTAG compliant, with the exception of requiring external pullup resistors on terminals TDI, TMS, and TRST. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
