SPC56EC74L7 datasheet(63/118 Pages) STMICROELECTRONICS

63 / 118 page

SPC564Bxx - SPC56ECxx

Electrical Characteristics

Doc ID 17478 Rev 4

63/118

VOL

CC P Output low level

Push Pull, IOL = 2 mA,

VDD = 5.0 V ± 10%, PAD3V5V = 0

(recommended)

—

0.1VDD

Push Pull, IOL = 1 mA,

VDD = 5.0 V ± 10%, PAD3V5V = 1

(3)

—

0.1VDD

Push Pull, IOL = 1 mA,

VDD = 3.3 V ± 10%, PAD3V5V = 1

(recommended)

——

0.5

Ttr

CC D

Output transition time

output pin(4)

MEDIUM configuration

CL = 25 pF,

VDD = 5.0 V ± 10%, PAD3V5V = 0

——

CL = 50 pF,

VDD = 5.0 V ± 10%, PAD3V5V = 0

——

CL = 100 pF,

VDD = 5.0 V ± 10%, PAD3V5V = 0

——

CL = 25 pF,

VDD = 3.3 V ± 10%, PAD3V5V = 1

——

CL = 50 pF,

VDD = 3.3 V ± 10%, PAD3V5V = 1

——

CL = 100 pF,

VDD = 3.3 V ± 10%, PAD3V5V = 1

——

WFRST SR P Reset input filtered pulse

—

WNFRST SR P

Reset input not filtered

pulse

—1000

—

|IWPU|CC P

Weak pull-up current

absolute value

VDD = 3.3 V ± 10%, PAD3V5V = 1

—

150

µA

VDD = 5.0 V ± 10%, PAD3V5V = 0

—

150

VDD = 5.0 V ± 10%, PAD3V5V = 1

(5)

—

250

VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 to 125 °C, unless otherwise specified.

VDD as mentioned in the table is VDD_HV_A/VDD_HV_B. All values need to be confirmed during device validation.

This is a transient configuration during power-up, up to the end of reset PHASE2 (refer to the RGM module section of the

device Reference Manual).

CL includes device and package capacitance (CPKG <5 pF).

The configuration PAD3V5 = 1 when VDD = 5 V is only transient configuration during power-up. All pads but RESET and

Nexus output (MDOx, EVTO, MCKO) are configured in input or in high impedance state.

Table 22.

Reset electrical characteristics (continued)

Symbol

Parameter

Conditions(1)

Value(2)

Unit

Min

Typ

Max

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